Common implementations and headers for ATmega family based micro-controllers. More...
Common implementations and headers for ATmega family based micro-controllers.
Basic definitions for the ATmega common module
When ever you want to do something hardware related, that is accessing MCUs registers directly, just include this file. It will then make sure that the MCU specific headers are included.
Definition in file cpu.h.
CPU_ATMEGA_CLK_SCALE_DIV1 = 0, CPU_ATMEGA_CLK_SCALE_DIV2 = 1, CPU_ATMEGA_CLK_SCALE_DIV4 = 2, CPU_ATMEGA_CLK_SCALE_DIV8 = 3,
CPU_ATMEGA_CLK_SCALE_DIV16 = 4, CPU_ATMEGA_CLK_SCALE_DIV32 = 5, CPU_ATMEGA_CLK_SCALE_DIV64 = 6, CPU_ATMEGA_CLK_SCALE_DIV128 = 7,
CPU_ATMEGA_CLK_SCALE_DIV256 = 8, CPU_ATMEGA_CLK_SCALE_DIV512 = 9
|ATmega system clock prescaler settings. More...|
|static uint8_t||atmega_get_state (void)|
|Atomically read the state (atmega_state) More...|
|static void||atmega_enter_isr (void)|
|Run this code on entering interrupt routines. |
|static int||atmega_is_uart_tx_pending (void)|
|Check if TX on any present UART device is still pending. More...|
|Run this code on exiting interrupt routines. |
|Initialization of the CPU. |
|static void||cpu_print_last_instruction (void)|
|Print the last instruction's address. |
|static void||atmega_set_prescaler (uint8_t clk_scale)|
|Initializes system clock prescaler. |
|Initializes avrlibc stdio. |
|Global variable containing the current state of the MCU. More...|
|In ISR. |
|TX pending for UART 0. |
|TX pending for UART 1. |
|#define||ATMEGA_STATE_FLAG_UART_TX(x) (0x01U << x)|
|TX pending for UART x. |
Atomically read the state (atmega_state)
This function guarantees that the read is not optimized out, not reordered and done atomically. This does not mean that by the time return value is processed that it still reflects the value currently stored in atmega_state.
Using ASM rather than C11 atomics has less overhead, as not every access to the state has to be performed atomically: Those done from ISR will not be interrupted (no support for nested interrupts) and barriers at the begin and end of the ISRs make sure the access takes place before IRQ context is left.
Global variable containing the current state of the MCU.
|IRQ||This bit is set when in IRQ context|
|unused||This bits are currently not used|
|TX1||This bit is set when on UART1 TX is pending|
|TX0||This bit is set when on UART0 TX is pending|