atmega_common/include/cpu.h
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1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  * 2014 Freie Universit├Ąt Berlin, Hinnerk van Bruinehsen
4  * 2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
30 #ifndef CPU_H
31 #define CPU_H
32 
33 #include <stdio.h>
34 #include <stdint.h>
35 
36 #include <avr/interrupt.h>
37 #include "cpu_conf.h"
38 #include "sched.h"
39 #include "thread.h"
44 #include "irq.h"
45 
46 #ifdef __cplusplus
47 extern "C"
48 {
49 #endif
50 
55 #define PERIPH_I2C_NEED_READ_REG
56 #define PERIPH_I2C_NEED_WRITE_REG
57 #define PERIPH_I2C_NEED_READ_REGS
58 #define PERIPH_I2C_NEED_WRITE_REGS
59 
64 extern volatile uint8_t __in_isr;
65 
69 static inline void __enter_isr(void)
70 {
71  __in_isr = 1;
72 }
73 
79 void thread_yield_isr(void);
80 
84 static inline void __exit_isr(void)
85 {
87  thread_yield();
88  __in_isr = 0;
90  }
91  __in_isr = 0;
92 }
93 
97 void cpu_init(void);
98 
102 static inline void __attribute__((always_inline)) cpu_print_last_instruction(void)
103 {
104  uint8_t hi;
105  uint8_t lo;
106  uint16_t ptr;
107 
108  __asm__ volatile ("in __tmp_reg__, __SP_H__ \n\t"
109  "mov %0, __tmp_reg__ \n\t"
110  : "=g" (hi));
111 
112  __asm__ volatile ("in __tmp_reg__, __SP_L__ \n\t"
113  "mov %0, __tmp_reg__ \n\t"
114  : "=g" (lo));
115  ptr = hi << 8 | lo;
116  printf("Stack Pointer: 0x%04x\n", ptr);
117 }
118 
124 enum {
125  CPU_ATMEGA_CLK_SCALE_DIV1 = 0,
126  CPU_ATMEGA_CLK_SCALE_DIV2 = 1,
127  CPU_ATMEGA_CLK_SCALE_DIV4 = 2,
128  CPU_ATMEGA_CLK_SCALE_DIV8 = 3,
129  CPU_ATMEGA_CLK_SCALE_DIV16 = 4,
130  CPU_ATMEGA_CLK_SCALE_DIV32 = 5,
131  CPU_ATMEGA_CLK_SCALE_DIV64 = 6,
132  CPU_ATMEGA_CLK_SCALE_DIV128 = 7,
133  CPU_ATMEGA_CLK_SCALE_DIV256 = 8,
134  CPU_ATMEGA_CLK_SCALE_DIV512 = 9,
135 };
136 
140 static inline void atmega_set_prescaler(uint8_t clk_scale)
141 {
142  /* Enable clock change */
143  /* Must be assignment to set all other bits to zero, see datasheet */
144  CLKPR = (1 << CLKPCE);
145 
146  /* Write clock within 4 cycles */
147  CLKPR = clk_scale;
148 }
149 
153 void atmega_stdio_init(void);
154 
155 #ifdef __cplusplus
156 }
157 #endif
158 
159 #endif /* CPU_H */
160 
volatile uint8_t __in_isr
global in-ISR state variable
void thread_yield_isr(void)
Exit ISR mode and yield with a return from interrupt.
static void __exit_isr(void)
Run this code on exiting interrupt routines.
static void atmega_set_prescaler(uint8_t clk_scale)
Initializes system clock prescaler.
void cpu_init(void)
Initialization of the CPU.
void atmega_stdio_init(void)
Initializes avrlibc stdio.
Implementation specific CPU configuration options.
static void __enter_isr(void)
Run this code on entering interrupt routines.
Threading API.
volatile unsigned int sched_context_switch_request
Flag indicating whether a context switch is necessary after handling an interrupt.
Scheduler API definition.
void thread_yield(void)
Lets current thread yield.
static void cpu_print_last_instruction(void)
Print the last instruction&#39;s address.
IRQ driver interface.
int printf(const char *format,...)
System standard printf function.