boards/bluepill/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 TriaGnoSys GmbH
3  * 2017 Alexander Kurth, Sören Tempel, Tristan Bruns
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
24 #ifndef PERIPH_CONF_H
25 #define PERIPH_CONF_H
26 
27 #include "periph_cpu.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
40 /* give the target core clock (HCLK) frequency [in Hz],
41  * maximum: 72MHz */
42 #define CLOCK_CORECLOCK (72000000U)
43 /* 0: no external high speed crystal available
44  * else: actual crystal frequency [in Hz] */
45 #define CLOCK_HSE (8000000U)
46 /* 0: no external low speed crystal available,
47  * 1: external crystal available (always 32.768kHz) */
48 #define CLOCK_LSE (1U)
49 /* peripheral clock setup */
50 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
51 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
52 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2 /* max 36MHz */
53 #define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
54 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* max 72MHz */
55 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
56 
57 /* PLL factors */
58 #define CLOCK_PLL_PREDIV (1)
59 #define CLOCK_PLL_MUL (9)
60 
66 #define ADC_CONFIG { \
67  { .dev = 0, .pin = GPIO_PIN(PORT_A, 0), .chan = 0 }, \
68  { .dev = 0, .pin = GPIO_PIN(PORT_A, 1), .chan = 1 }, \
69  { .dev = 0, .pin = GPIO_PIN(PORT_A, 2), .chan = 2 }, \
70  { .dev = 0, .pin = GPIO_PIN(PORT_A, 3), .chan = 3 }, \
71  { .dev = 0, .pin = GPIO_PIN(PORT_A, 4), .chan = 4 }, \
72  { .dev = 0, .pin = GPIO_PIN(PORT_A, 5), .chan = 5 }, \
73  { .dev = 0, .pin = GPIO_PIN(PORT_A, 6), .chan = 6 }, \
74  { .dev = 0, .pin = GPIO_PIN(PORT_A, 7), .chan = 7 }, \
75  { .dev = 0, .pin = GPIO_PIN(PORT_B, 0), .chan = 8 }, \
76  { .dev = 0, .pin = GPIO_PIN(PORT_B, 1), .chan = 9 }, \
77 }
78 
79 #define ADC_NUMOF 10
80 
86 static const timer_conf_t timer_config[] = {
87  {
88  .dev = TIM2,
89  .max = 0x0000ffff,
90  .rcc_mask = RCC_APB1ENR_TIM2EN,
91  .bus = APB1,
92  .irqn = TIM2_IRQn
93  },
94  {
95  .dev = TIM3,
96  .max = 0x0000ffff,
97  .rcc_mask = RCC_APB1ENR_TIM3EN,
98  .bus = APB1,
99  .irqn = TIM3_IRQn
100  },
101  {
102  .dev = TIM4,
103  .max = 0x0000ffff,
104  .rcc_mask = RCC_APB1ENR_TIM4EN,
105  .bus = APB1,
106  .irqn = TIM4_IRQn
107  }
108 };
109 
110 #define TIMER_0_ISR isr_tim2
111 #define TIMER_1_ISR isr_tim3
112 #define TIMER_2_ISR isr_tim4
113 
114 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
115 
121 static const uart_conf_t uart_config[] = {
122  {
123  .dev = USART1,
124  .rcc_mask = RCC_APB2ENR_USART1EN,
125  .rx_pin = GPIO_PIN(PORT_A, 10),
126  .tx_pin = GPIO_PIN(PORT_A, 9),
127  .bus = APB2,
128  .irqn = USART1_IRQn
129  },
130  {
131  .dev = USART2,
132  .rcc_mask = RCC_APB1ENR_USART2EN,
133  .rx_pin = GPIO_PIN(PORT_A, 3),
134  .tx_pin = GPIO_PIN(PORT_A, 2),
135  .bus = APB1,
136  .irqn = USART2_IRQn
137  },
138  {
139  .dev = USART3,
140  .rcc_mask = RCC_APB1ENR_USART3EN,
141  .rx_pin = GPIO_PIN(PORT_B, 11),
142  .tx_pin = GPIO_PIN(PORT_B, 10),
143  .bus = APB1,
144  .irqn = USART3_IRQn
145  }
146 };
147 
148 #define UART_0_ISR (isr_usart1)
149 #define UART_1_ISR (isr_usart2)
150 #define UART_2_ISR (isr_usart3)
151 
152 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
153 
159 #define I2C_NUMOF (2U)
160 #define I2C_0_EN 1
161 #define I2C_1_EN 0 /* Disabled by default since pins collide with USART3. */
162 #define I2C_IRQ_PRIO 1
163 #define I2C_APBCLK (CLOCK_APB1)
164 
165 /* I2C 0 device configuration */
166 #define I2C_0_DEV I2C1
167 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
168 #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
169 #define I2C_0_EVT_IRQ I2C1_EV_IRQn
170 #define I2C_0_EVT_ISR isr_i2c1_ev
171 #define I2C_0_ERR_IRQ I2C1_ER_IRQn
172 #define I2C_0_ERR_ISR isr_i2c1_er
173 /* I2C 0 pin configuration */
174 #define I2C_0_SCL_PIN GPIO_PIN(PORT_B, 6)
175 #define I2C_0_SDA_PIN GPIO_PIN(PORT_B, 7)
176 
177 /* I2C 1 device configuration */
178 #define I2C_1_DEV I2C2
179 #define I2C_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C2EN))
180 #define I2C_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C2EN))
181 #define I2C_1_EVT_IRQ I2C2_EV_IRQn
182 #define I2C_1_EVT_ISR isr_i2c2_ev
183 #define I2C_1_ERR_IRQ I2C2_ER_IRQn
184 #define I2C_1_ERR_ISR isr_i2c2_er
185 /* I2C 1 pin configuration */
186 #define I2C_1_SCL_PIN GPIO_PIN(PORT_B, 10)
187 #define I2C_1_SDA_PIN GPIO_PIN(PORT_B, 11)
188 
194 static const pwm_conf_t pwm_config[] = {
195  {
196  .dev = TIM1,
197  .rcc_mask = RCC_APB2ENR_TIM1EN,
198  .chan = { { .pin = GPIO_PIN(PORT_A, 8), .cc_chan = 0 },
199  { .pin = GPIO_PIN(PORT_A, 9), .cc_chan = 1 },
200  { .pin = GPIO_PIN(PORT_A, 10), .cc_chan = 2 },
201  { .pin = GPIO_PIN(PORT_A, 11), .cc_chan = 3 } },
202  .af = GPIO_AF_OUT_PP,
203  .bus = APB2
204  }
205 };
206 
207 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
208 
217 static const uint8_t spi_divtable[2][5] = {
218  { /* for APB1 @ 36000000Hz */
219  7, /* -> 140625Hz */
220  6, /* -> 281250Hz */
221  4, /* -> 1125000Hz */
222  2, /* -> 4500000Hz */
223  1 /* -> 9000000Hz */
224  },
225  { /* for APB2 @ 72000000Hz */
226  7, /* -> 281250Hz */
227  7, /* -> 281250Hz */
228  5, /* -> 1125000Hz */
229  3, /* -> 4500000Hz */
230  2 /* -> 9000000Hz */
231  }
232 };
233 
234 static const spi_conf_t spi_config[] = {
235  {
236  .dev = SPI1,
237  .mosi_pin = GPIO_PIN(PORT_A, 7),
238  .miso_pin = GPIO_PIN(PORT_A, 6),
239  .sclk_pin = GPIO_PIN(PORT_A, 5),
240  .cs_pin = GPIO_PIN(PORT_A, 4),
241  .rccmask = RCC_APB2ENR_SPI1EN,
242  .apbbus = APB2
243  },
244  {
245  .dev = SPI2,
246  .mosi_pin = GPIO_PIN(PORT_B, 15),
247  .miso_pin = GPIO_PIN(PORT_B, 14),
248  .sclk_pin = GPIO_PIN(PORT_B, 13),
249  .cs_pin = GPIO_PIN(PORT_B, 12),
250  .rccmask = RCC_APB1ENR_SPI2EN,
251  .apbbus = APB1
252  }
253 };
254 
255 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
256 
258 #ifdef __cplusplus
259 }
260 #endif
261 
262 #endif /* PERIPH_CONF_H */
void * dev
UART, USART or LEUART device used.
TIMER_TypeDef * dev
TIMER device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
PWM device configuration.
NRF_TIMER_Type * dev
timer device
UART device configuration.
SPI module configuration options.
Timer configuration.
cc2538_ssi_t * dev
SSI device.