boards/sodaq-explorer/include/periph_conf.h File Reference

Configuration of CPU peripherals for the Sodaq LoRaWAN Explorer board. More...

Detailed Description

Configuration of CPU peripherals for the Sodaq LoRaWAN Explorer board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file boards/sodaq-explorer/include/periph_conf.h.

#include "periph_cpu.h"
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Go to the source code of this file.

Macros

External oscillator and clock configuration

For selection of the used CORECLOCK, we have implemented two choices:

  • usage of the PLL fed by the internal 8MHz oscillator divided by 8
  • usage of the internal 8MHz oscillator directly, divided by N if needed

The PLL option allows for the usage of a wider frequency range and a more stable clock with less jitter. This is why we use this option as default.

The target frequency is computed from the PLL multiplier and the PLL divisor. Use the following formula to compute your values:

CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV

NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL frequency is 96MHz. So PLL_MULL must be between 31 and 95!

The internal Oscillator used directly can lead to a slightly better power efficiency to the cost of a less stable clock. Use this option when you know what you are doing! The actual core frequency is adjusted as follows:

CORECLOCK = 8MHz / DIV

NOTE: A core clock frequency below 1MHz is not recommended

#define CLOCK_USE_PLL   (1)
 
#define CLOCK_PLL_MUL   (47U) /* must be >= 31 & <= 95 */
 
#define CLOCK_PLL_DIV   (1U) /* adjust to your needs */
 
#define CLOCK_CORECLOCK   (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
 
Timer peripheral configuration
#define TIMER_NUMOF   (2U)
 
#define TIMER_0_EN   1
 
#define TIMER_1_EN   1
 
#define TIMER_0_DEV   TC3->COUNT16
 
#define TIMER_0_CHANNELS   2
 
#define TIMER_0_MAX_VALUE   (0xffff)
 
#define TIMER_0_ISR   isr_tc3
 
#define TIMER_1_DEV   TC4->COUNT32
 
#define TIMER_1_CHANNELS   2
 
#define TIMER_1_MAX_VALUE   (0xffffffff)
 
#define TIMER_1_ISR   isr_tc4
 
I2C configuration
#define I2C_NUMOF   (2U)
 
#define I2C_0_EN   1
 
#define I2C_1_EN   1
 
#define I2C_2_EN   0
 
#define I2C_3_EN   0
 
#define I2C_IRQ_PRIO   1
 
#define I2C_0_DEV   SERCOM1->I2CM
 
#define I2C_0_IRQ   SERCOM1_IRQn
 
#define I2C_0_ISR   isr_sercom1
 
#define I2C_0_GCLK_ID   SERCOM1_GCLK_ID_CORE
 
#define I2C_0_GCLK_ID_SLOW   SERCOM1_GCLK_ID_SLOW
 
#define I2C_0_SDA   GPIO_PIN(PA, 16)
 
#define I2C_0_SCL   GPIO_PIN(PA, 17)
 
#define I2C_0_MUX   GPIO_MUX_C
 
#define I2C_1_DEV   SERCOM2->I2CM
 
#define I2C_1_IRQ   SERCOM2_IRQn
 
#define I2C_1_ISR   isr_sercom2
 
#define I2C_1_GCLK_ID   SERCOM2_GCLK_ID_CORE
 
#define I2C_1_GCLK_ID_SLOW   SERCOM2_GCLK_ID_SLOW
 
#define I2C_1_SDA   GPIO_PIN(PA, 8)
 
#define I2C_1_SCL   GPIO_PIN(PA, 9)
 
#define I2C_1_MUX   GPIO_MUX_C
 
RTC configuration
#define RTC_NUMOF   (1U)
 
#define RTC_DEV   RTC->MODE2
 
RTT configuration
#define RTT_NUMOF   (1U)
 
#define RTT_DEV   RTC->MODE0
 
#define RTT_IRQ   RTC_IRQn
 
#define RTT_IRQ_PRIO   10
 
#define RTT_ISR   isr_rtc
 
#define RTT_MAX_VALUE   (0xffffffff)
 
#define RTT_FREQUENCY   (32768U) /* in Hz. For changes see `rtt.c` */
 
#define RTT_RUNSTDBY   (1) /* Keep RTT running in sleep states */
 

UART configuration

#define UART_0_ISR   isr_sercom5
 
#define UART_1_ISR   isr_sercom4
 
#define UART_2_ISR   isr_sercom0
 
#define UART_NUMOF   (sizeof(uart_config) / sizeof(uart_config[0]))
 
static const uart_conf_t uart_config []
 

ADC configuration

#define ADC_0_EN   1
 
#define ADC_MAX_CHANNELS   17
 
#define ADC_0_DEV   ADC
 
#define ADC_0_IRQ   ADC_IRQn
 
#define ADC_0_CLK_SOURCE   0 /* GCLK_GENERATOR_0 */
 
#define ADC_0_PRESCALER   ADC_CTRLB_PRESCALER_DIV512
 
#define ADC_0_NEG_INPUT   ADC_INPUTCTRL_MUXNEG_GND
 
#define ADC_0_GAIN_FACTOR_DEFAULT   ADC_INPUTCTRL_GAIN_1X
 
#define ADC_0_REF_DEFAULT   ADC_REFCTRL_REFSEL_INT1V
 
#define ADC_0_CHANNELS   (7U)
 
#define ADC_NUMOF   ADC_0_CHANNELS
 
static const adc_conf_chan_t adc_channels []
 

SPI configuration

#define SPI_NUMOF   (sizeof(spi_config) / sizeof(spi_config[0]))
 
static const spi_conf_t spi_config []
 

Variable Documentation

◆ adc_channels

const adc_conf_chan_t adc_channels[]
static
Initial value:
= {
{GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8},
{GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9},
{GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10},
{GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11},
{GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16},
{GPIO_PIN(PA, 9), ADC_INPUTCTRL_MUXPOS_PIN17},
{GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4},
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.

Definition at line 159 of file boards/sodaq-explorer/include/periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = &SERCOM3->SPI,
.miso_pin = GPIO_PIN(PA, 22),
.mosi_pin = GPIO_PIN(PA, 20),
.clk_pin = GPIO_PIN(PA, 21),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_0,
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
select peripheral function C
use pad 2 for MOSI, pad 3 for SCK

Definition at line 178 of file boards/sodaq-explorer/include/periph_conf.h.