boards/sodaq-explorer/include/periph_conf.h
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1 /*
2  * Copyright (C) 2017 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
59 #define CLOCK_USE_PLL (1)
60 
61 #if CLOCK_USE_PLL
62 /* edit these values to adjust the PLL output frequency */
63 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
64 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
65 /* generate the actual used core clock frequency */
66 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
67 #else
68 /* edit this value to your needs */
69 #define CLOCK_DIV (1U)
70 /* generate the actual core clock frequency */
71 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
72 #endif
73 
79 #define TIMER_NUMOF (2U)
80 #define TIMER_0_EN 1
81 #define TIMER_1_EN 1
82 
83 /* Timer 0 configuration */
84 #define TIMER_0_DEV TC3->COUNT16
85 #define TIMER_0_CHANNELS 2
86 #define TIMER_0_MAX_VALUE (0xffff)
87 #define TIMER_0_ISR isr_tc3
88 
89 /* Timer 1 configuration */
90 #define TIMER_1_DEV TC4->COUNT32
91 #define TIMER_1_CHANNELS 2
92 #define TIMER_1_MAX_VALUE (0xffffffff)
93 #define TIMER_1_ISR isr_tc4
94 
100 static const uart_conf_t uart_config[] = {
101  {
102  .dev = &SERCOM5->USART,
103  .rx_pin = GPIO_PIN(PB,31), /* D0, RX Pin */
104  .tx_pin = GPIO_PIN(PB,30), /* D1, TX Pin */
105  .mux = GPIO_MUX_D,
106  .rx_pad = UART_PAD_RX_1,
107  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
108  .flags = UART_FLAG_NONE,
109  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0
110  },
111  {
112  .dev = &SERCOM4->USART,
113  .rx_pin = GPIO_PIN(PB,13),
114  .tx_pin = GPIO_PIN(PB,14),
115  .mux = GPIO_MUX_C,
116  .rx_pad = UART_PAD_RX_1,
117  .tx_pad = UART_PAD_TX_2,
118  .flags = UART_FLAG_NONE,
119  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0
120  },
121  { /* Connected to RN2483 */
122  .dev = &SERCOM0->USART,
123  .rx_pin = GPIO_PIN(PA,5),
124  .tx_pin = GPIO_PIN(PA,6),
125  .mux = GPIO_MUX_D,
126  .rx_pad = UART_PAD_RX_1,
127  .tx_pad = UART_PAD_TX_2,
128  .flags = UART_FLAG_NONE,
129  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0
130  },
131 };
132 
133 /* interrupt function name mapping */
134 #define UART_0_ISR isr_sercom5
135 #define UART_1_ISR isr_sercom4
136 #define UART_2_ISR isr_sercom0
137 
138 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
139 
145 #define ADC_0_EN 1
146 #define ADC_MAX_CHANNELS 17
147 /* ADC 0 device configuration */
148 #define ADC_0_DEV ADC
149 #define ADC_0_IRQ ADC_IRQn
150 
151 /* ADC 0 Default values */
152 #define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
153 #define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
154 
155 #define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
156 #define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
157 #define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
158 
159 static const adc_conf_chan_t adc_channels[] = {
160  /* port, pin, muxpos */
161  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8}, /* A0 */
162  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9}, /* A1 */
163  {GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10}, /* A2 */
164  {GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11}, /* A3 */
165  {GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16}, /* A4 */
166  {GPIO_PIN(PA, 9), ADC_INPUTCTRL_MUXPOS_PIN17}, /* A5 */
167  {GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4}, /* A6 (temperature) */
168 };
169 
170 #define ADC_0_CHANNELS (7U)
171 #define ADC_NUMOF ADC_0_CHANNELS
172 
178 static const spi_conf_t spi_config[] = {
179  {
180  .dev = &SERCOM3->SPI,
181  .miso_pin = GPIO_PIN(PA, 22),
182  .mosi_pin = GPIO_PIN(PA, 20),
183  .clk_pin = GPIO_PIN(PA, 21),
184  .miso_mux = GPIO_MUX_C,
185  .mosi_mux = GPIO_MUX_C,
186  .clk_mux = GPIO_MUX_C,
187  .miso_pad = SPI_PAD_MISO_0,
188  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
189  }
190 };
191 
192 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
193 
199 #define I2C_NUMOF (2U)
200 #define I2C_0_EN 1
201 #define I2C_1_EN 1
202 #define I2C_2_EN 0
203 #define I2C_3_EN 0
204 #define I2C_IRQ_PRIO 1
205 
206 #define I2C_0_DEV SERCOM1->I2CM
207 #define I2C_0_IRQ SERCOM1_IRQn
208 #define I2C_0_ISR isr_sercom1
209 /* I2C 0 GCLK */
210 #define I2C_0_GCLK_ID SERCOM1_GCLK_ID_CORE
211 #define I2C_0_GCLK_ID_SLOW SERCOM1_GCLK_ID_SLOW
212 /* I2C 0 pin configuration */
213 #define I2C_0_SDA GPIO_PIN(PA, 16)
214 #define I2C_0_SCL GPIO_PIN(PA, 17)
215 #define I2C_0_MUX GPIO_MUX_C
216 
217 #define I2C_1_DEV SERCOM2->I2CM
218 #define I2C_1_IRQ SERCOM2_IRQn
219 #define I2C_1_ISR isr_sercom2
220 /* I2C 1 GCLK */
221 #define I2C_1_GCLK_ID SERCOM2_GCLK_ID_CORE
222 #define I2C_1_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
223 /* I2C 1 pin configuration */
224 #define I2C_1_SDA GPIO_PIN(PA, 8)
225 #define I2C_1_SCL GPIO_PIN(PA, 9)
226 #define I2C_1_MUX GPIO_MUX_C
227 
233 #define RTC_NUMOF (1U)
234 #define RTC_DEV RTC->MODE2
235 
241 #define RTT_NUMOF (1U)
242 #define RTT_DEV RTC->MODE0
243 #define RTT_IRQ RTC_IRQn
244 #define RTT_IRQ_PRIO 10
245 #define RTT_ISR isr_rtc
246 #define RTT_MAX_VALUE (0xffffffff)
247 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
248 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
249 
251 #ifdef __cplusplus
252 }
253 #endif
254 
255 #endif /* PERIPH_CONF_H */
256 
select peripheral function D
void * dev
UART, USART or LEUART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
ADC Channel Configuration.
select peripheral function C
UART device configuration.
use pad 2 for MOSI, pad 3 for SCK
SPI module configuration options.
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
cc2538_ssi_t * dev
SSI device.