boards/stm32f3discovery/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
35 /* give the target core clock (HCLK) frequency [in Hz],
36  * maximum: 72MHz */
37 #define CLOCK_CORECLOCK (72000000U)
38 /* 0: no external high speed crystal available
39  * else: actual crystal frequency [in Hz] */
40 #define CLOCK_HSE (8000000U)
41 /* 0: no external low speed crystal available,
42  * 1: external crystal available (always 32.768kHz) */
43 #define CLOCK_LSE (1)
44 /* peripheral clock setup */
45 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
46 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
47 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2 /* max 36MHz */
48 #define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
49 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* max 72MHz */
50 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
51 
52 /* PLL factors */
53 #define CLOCK_PLL_PREDIV (1)
54 #define CLOCK_PLL_MUL (9)
55 
61 static const dac_conf_t dac_config[] = {
62  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 }
63 };
64 
65 #define DAC_NUMOF (sizeof(dac_config) / sizeof(dac_config[0]))
66 
72 static const timer_conf_t timer_config[] = {
73  {
74  .dev = TIM2,
75  .max = 0xffffffff,
76  .rcc_mask = RCC_APB1ENR_TIM2EN,
77  .bus = APB1,
78  .irqn = TIM2_IRQn
79  }
80 };
81 
82 #define TIMER_0_ISR isr_tim2
83 
84 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
85 
91 static const uart_conf_t uart_config[] = {
92  {
93  .dev = USART1,
94  .rcc_mask = RCC_APB2ENR_USART1EN,
95  .rx_pin = GPIO_PIN(PORT_A, 10),
96  .tx_pin = GPIO_PIN(PORT_A, 9),
97  .rx_af = GPIO_AF7,
98  .tx_af = GPIO_AF7,
99  .bus = APB2,
100  .irqn = USART1_IRQn
101  },
102  {
103  .dev = USART2,
104  .rcc_mask = RCC_APB1ENR_USART2EN,
105  .rx_pin = GPIO_PIN(PORT_D, 6),
106  .tx_pin = GPIO_PIN(PORT_D, 5),
107  .rx_af = GPIO_AF7,
108  .tx_af = GPIO_AF7,
109  .bus = APB1,
110  .irqn = USART2_IRQn
111  },
112  {
113  .dev = USART3,
114  .rcc_mask = RCC_APB1ENR_USART3EN,
115  .rx_pin = GPIO_PIN(PORT_D, 9),
116  .tx_pin = GPIO_PIN(PORT_D, 8),
117  .rx_af = GPIO_AF7,
118  .tx_af = GPIO_AF7,
119  .bus = APB1,
120  .irqn = USART3_IRQn
121  }
122 };
123 
124 #define UART_0_ISR (isr_usart1)
125 #define UART_1_ISR (isr_usart2)
126 #define UART_2_ISR (isr_usart3)
127 
128 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
129 
135 static const pwm_conf_t pwm_config[] = {
136  {
137  .dev = TIM3,
138  .rcc_mask = RCC_APB1ENR_TIM3EN,
139  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
140  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
141  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
142  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
143  .af = GPIO_AF2,
144  .bus = APB1
145  },
146  {
147  .dev = TIM4,
148  .rcc_mask = RCC_APB1ENR_TIM4EN,
149  .chan = { { .pin = GPIO_PIN(PORT_D, 12), .cc_chan = 0},
150  { .pin = GPIO_PIN(PORT_D, 13), .cc_chan = 1},
151  { .pin = GPIO_PIN(PORT_D, 14), .cc_chan = 2},
152  { .pin = GPIO_PIN(PORT_D, 15), .cc_chan = 3} },
153  .af = GPIO_AF2,
154  .bus = APB1
155  }
156 };
157 
158 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
159 
165 static const uint8_t spi_divtable[2][5] = {
166  { /* for APB1 @ 36000000Hz */
167  7, /* -> 140625Hz */
168  6, /* -> 281250Hz */
169  4, /* -> 1125000Hz */
170  2, /* -> 4500000Hz */
171  1 /* -> 9000000Hz */
172  },
173  { /* for APB2 @ 72000000Hz */
174  7, /* -> 281250Hz */
175  7, /* -> 281250Hz */
176  5, /* -> 1125000Hz */
177  3, /* -> 4500000Hz */
178  2 /* -> 9000000Hz */
179  }
180 };
181 
182 static const spi_conf_t spi_config[] = {
183  {
184  .dev = SPI1,
185  .mosi_pin = GPIO_PIN(PORT_A, 7),
186  .miso_pin = GPIO_PIN(PORT_A, 6),
187  .sclk_pin = GPIO_PIN(PORT_A, 5),
188  .cs_pin = GPIO_UNDEF,
189  .af = GPIO_AF5,
190  .rccmask = RCC_APB2ENR_SPI1EN,
191  .apbbus = APB2
192  },
193  {
194  .dev = SPI3,
195  .mosi_pin = GPIO_PIN(PORT_C, 12),
196  .miso_pin = GPIO_PIN(PORT_C, 11),
197  .sclk_pin = GPIO_PIN(PORT_C, 10),
198  .cs_pin = GPIO_PIN(PORT_A, 15),
199  .af = GPIO_AF6,
200  .rccmask = RCC_APB1ENR_SPI3EN,
201  .apbbus = APB1
202  }
203 };
204 
205 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
206 
212 static const i2c_conf_t i2c_config[] = {
213  {
214  .dev = I2C1,
215  .speed = I2C_SPEED_NORMAL,
216  .scl_pin = GPIO_PIN(PORT_B, 6),
217  .sda_pin = GPIO_PIN(PORT_B, 7),
218  .scl_af = GPIO_AF4,
219  .sda_af = GPIO_AF4,
220  .bus = APB1,
221  .rcc_mask = RCC_APB1ENR_I2C1EN,
222  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
223  .irqn = I2C1_ER_IRQn
224  },
225  {
226  .dev = I2C2,
227  .speed = I2C_SPEED_NORMAL,
228  .scl_pin = GPIO_PIN(PORT_F, 1),
229  .sda_pin = GPIO_PIN(PORT_F, 0),
230  .scl_af = GPIO_AF4,
231  .sda_af = GPIO_AF4,
232  .bus = APB1,
233  .rcc_mask = RCC_APB1ENR_I2C2EN,
234  .rcc_sw_mask = RCC_CFGR3_I2C2SW,
235  .irqn = I2C2_ER_IRQn
236  }
237 };
238 
239 #define I2C_0_ISR isr_i2c1_er
240 #define I2C_1_ISR isr_i2c2_er
241 
242 #define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
243 
245 #ifdef __cplusplus
246 }
247 #endif
248 
249 #endif /* PERIPH_CONF_H */
use alternate function 4
use alternate function 7
cc2538_uart_t * dev
pointer to the used UART device
I2C configuration options.
TIMER_TypeDef * dev
TIMER device used.
gpio_t pin
pin connected to the line
use alternate function 6
SPI_Type * dev
SPI device to use.
PWM device configuration.
NRF_TIMER_Type * dev
timer device
use alternate function 5
UART device configuration.
I2C_TypeDef * dev
USART device used.
DAC line configuration data.
SPI module configuration options.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
normal mode: ~100kbit/s
Timer configuration.
use alternate function 2