STM32 Nucleo144-F767

Support for the STM32 Nucleo144-F767. More...

Detailed Description

Support for the STM32 Nucleo144-F767.

Files

file  boards/nucleo144-f767/include/periph_conf.h
 Peripheral MCU configuration for the nucleo144-f767 board.
 

Clock settings

Note
This is auto-generated from cpu/stm32_common/dist/clk_conf/clk_conf.c
#define CLOCK_CORECLOCK   (216000000U)
 
#define CLOCK_HSE   (8000000U)
 
#define CLOCK_LSE   (1)
 
#define CLOCK_AHB_DIV   RCC_CFGR_HPRE_DIV1
 
#define CLOCK_AHB   (CLOCK_CORECLOCK / 1)
 
#define CLOCK_APB1_DIV   RCC_CFGR_PPRE1_DIV4 /* max 54MHz */
 
#define CLOCK_APB1   (CLOCK_CORECLOCK / 4)
 
#define CLOCK_APB2_DIV   RCC_CFGR_PPRE2_DIV2 /* max 108MHz */
 
#define CLOCK_APB2   (CLOCK_CORECLOCK / 2)
 
#define CLOCK_PLL_M   (4)
 
#define CLOCK_PLL_N   (216)
 
#define CLOCK_PLL_P   (2)
 
#define CLOCK_PLL_Q   (9)
 

Timer configuration

static const timer_conf_t timer_config []
 
#define TIMER_0_ISR   isr_tim2
 
#define TIMER_NUMOF   (sizeof(timer_config) / sizeof(timer_config[0]))
 

UART configuration

static const uart_conf_t uart_config []
 
#define UART_0_ISR   (isr_usart3)
 
#define UART_0_DMA_ISR   (isr_dma1_stream6)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_1_DMA_ISR   (isr_dma1_stream5)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_2_DMA_ISR   (isr_dma1_stream4)
 
#define UART_NUMOF   (sizeof(uart_config) / sizeof(uart_config[0]))
 

ADC configuration

#define ADC_NUMOF   (0)
 

Variable Documentation

◆ timer_config

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
}

Definition at line 65 of file boards/nucleo144-f767/include/periph_conf.h.