kinetis/include/periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file kinetis/include/periph_cpu.h.

#include <stdint.h>
#include <stdbool.h>
#include "cpu.h"
+ Include dependency graph for kinetis/include/periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  adc_conf_t
 ADC device configuration. More...
 
struct  pit_conf_t
 CPU specific timer PIT module configuration. More...
 
struct  lptmr_conf_t
 CPU specific timer LPTMR module configuration. More...
 
struct  pwm_conf_t
 PWM device configuration. More...
 
struct  spi_conf_t
 SPI module configuration options. More...
 
struct  uart_conf_t
 UART device configuration. More...
 
struct  clock_config_t
 Clock configuration for Kinetis CPUs. More...
 

Macros

#define GPIO_UNDEF   (0xffff)
 Definition of a fitting UNDEF value.
 
#define GPIO_PIN(x, y)   (((x + 1) << 12) | (x << 6) | y)
 Define a CPU specific GPIO pin generator macro.
 
#define CPUID_ADDR   (&SIM->UIDH)
 Starting offset of CPU_ID.
 
#define CPUID_LEN   (16U)
 Length of the CPU_ID in octets.
 
#define GPIO_MODE(pu, pe, od, out)   (pu | (pe << 1) | (od << 5) | (out << 7))
 Generate GPIO mode bitfields. More...
 
#define PWM_CHAN_MAX   (4U)
 Define the maximum number of PWM channels that can be configured.
 
#define SPI_HWCS(x)   (x)
 Define a CPU specific SPI hardware chip select line macro. More...
 
#define SPI_HWCS_NUMOF   (5)
 Kinetis CPUs have a maximum number of 5 hardware chip select lines.
 
#define PERIPH_TIMER_PROVIDES_SET
 Prevent shared timer functions from being used.
 
#define PM_NUM_MODES   (1U)
 define number of usable power modes
 
#define KINETIS_HAVE_PLL   1
 Defined to 1 if the MCG in this Kinetis CPU has a PLL.
 
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
 This CPU makes use of the following shared SPI functions.
 
#define PERIPH_SPI_NEEDS_TRANSFER_REG
 
#define PERIPH_SPI_NEEDS_TRANSFER_REGS
 
#define TIMER_PIT_DEV(x)   (TIMER_DEV(0 + (x)))
 Hardware timer type-specific device macros.
 
#define TIMER_LPTMR_DEV(x)   (TIMER_DEV(PIT_NUMOF + (x)))
 

Typedefs

typedef enum kinetis_mcg_mode kinetis_mcg_mode_t
 Kinetis possible MCG modes.
 

Enumerations

enum  gpio_pcr_t {
  GPIO_AF_ANALOG = PORT_PCR_MUX(0), GPIO_AF_GPIO = PORT_PCR_MUX(1), GPIO_AF_2 = PORT_PCR_MUX(2), GPIO_AF_3 = PORT_PCR_MUX(3),
  GPIO_AF_4 = PORT_PCR_MUX(4), GPIO_AF_5 = PORT_PCR_MUX(5), GPIO_AF_6 = PORT_PCR_MUX(6), GPIO_AF_7 = PORT_PCR_MUX(7),
  GPIO_PCR_OD = (PORT_PCR_ODE_MASK), GPIO_PCR_PD = (PORT_PCR_PE_MASK), GPIO_PCR_PU = (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)
}
 Define a condensed set of PORT PCR values. More...
 
enum  {
  PORT_A = 0, PORT_B = 1, PORT_C = 2, PORT_D = 3,
  PORT_E = 4, PORT_F = 5, PORT_G = 6, GPIO_PORTS_NUMOF
}
 Available ports on the Kinetis family. More...
 
enum  uart_mode_t { UART_MODE_8N1 = 0 }
 UART transmission modes. More...
 
enum  { TIMER_PIT, TIMER_LPTMR }
 Possible timer module types. More...
 
enum  uart_type_t { KINETIS_UART, KINETIS_LPUART }
 UART hardware module types. More...
 
enum  kinetis_mcg_mode {
  KINETIS_MCG_MODE_FEI = 0, KINETIS_MCG_MODE_FEE = 1, KINETIS_MCG_MODE_FBI = 2, KINETIS_MCG_MODE_FBE = 3,
  KINETIS_MCG_MODE_BLPI = 4, KINETIS_MCG_MODE_BLPE = 5, KINETIS_MCG_MODE_PBE = 6, KINETIS_MCG_MODE_PEE = 7,
  KINETIS_MCG_MODE_NUMOF
}
 Kinetis possible MCG modes. More...
 
enum  kinetis_mcg_fll_t {
  KINETIS_MCG_FLL_FACTOR_640 = (MCG_C4_DRST_DRS(0)), KINETIS_MCG_FLL_FACTOR_732 = (MCG_C4_DRST_DRS(0) | MCG_C4_DMX32_MASK), KINETIS_MCG_FLL_FACTOR_1280 = (MCG_C4_DRST_DRS(1)), KINETIS_MCG_FLL_FACTOR_1464 = (MCG_C4_DRST_DRS(1) | MCG_C4_DMX32_MASK),
  KINETIS_MCG_FLL_FACTOR_1920 = (MCG_C4_DRST_DRS(2)), KINETIS_MCG_FLL_FACTOR_2197 = (MCG_C4_DRST_DRS(2) | MCG_C4_DMX32_MASK), KINETIS_MCG_FLL_FACTOR_2560 = (MCG_C4_DRST_DRS(3)), KINETIS_MCG_FLL_FACTOR_2929 = (MCG_C4_DRST_DRS(3) | MCG_C4_DMX32_MASK)
}
 Kinetis MCG FLL multiplier settings. More...
 
enum  kinetis_mcg_erc_range_t { KINETIS_MCG_ERC_RANGE_LOW = MCG_C2_RANGE0(0), KINETIS_MCG_ERC_RANGE_HIGH = MCG_C2_RANGE0(1), KINETIS_MCG_ERC_RANGE_VERY_HIGH = MCG_C2_RANGE0(2) }
 Kinetis FLL external reference clock range settings. More...
 

Functions

void gpio_init_port (gpio_t pin, uint32_t pcr)
 CPU internal function for initializing PORTs. More...
 
#define HAVE_GPIO_T
 Overwrite the default gpio_t type definition.
 
typedef uint16_t gpio_t
 

Macro Definition Documentation

◆ GPIO_MODE

#define GPIO_MODE (   pu,
  pe,
  od,
  out 
)    (pu | (pe << 1) | (od << 5) | (out << 7))

Generate GPIO mode bitfields.

We use the following bits to encode the pin mode:

  • bit 0: 0 for pull-down or 1 for pull-up
  • bit 1: pull resistor enable (as configured in bit 0)
  • bit 5: OD enable
  • bit 7: output or input mode

Definition at line 67 of file kinetis/include/periph_cpu.h.

◆ SPI_HWCS

#define SPI_HWCS (   x)    (x)

Define a CPU specific SPI hardware chip select line macro.

We simply map the 5 hardware channels to the numbers [0-4], this still allows us to differentiate between GPIP_PINs and SPI_HWSC lines.

Definition at line 80 of file kinetis/include/periph_cpu.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the Kinetis family.

Todo:
This is not equal for all members of the Kinetis family, right?
Enumerator
PORT_A 

port A

PORT_B 

port B

PORT_C 

port C

PORT_D 

port D

PORT_E 

port E

PORT_F 

port F

PORT_G 

port G

GPIO_PORTS_NUMOF 

overall number of available ports

Definition at line 161 of file kinetis/include/periph_cpu.h.

◆ anonymous enum

anonymous enum

Possible timer module types.

Enumerator
TIMER_PIT 

PIT.

TIMER_LPTMR 

LPTMR.

Definition at line 311 of file kinetis/include/periph_cpu.h.

◆ gpio_pcr_t

enum gpio_pcr_t

Define a condensed set of PORT PCR values.

To combine values just aggregate them using a logical OR.

Enumerator
GPIO_AF_ANALOG 

use pin as analog input

GPIO_AF_GPIO 

use pin as GPIO

GPIO_AF_2 

use alternate function 2

GPIO_AF_3 

use alternate function 3

GPIO_AF_4 

use alternate function 4

GPIO_AF_5 

use alternate function 5

GPIO_AF_6 

use alternate function 6

GPIO_AF_7 

use alternate function 7

GPIO_PCR_OD 

open-drain mode

GPIO_PCR_PD 

enable pull-down

GPIO_PCR_PU 

enable PU

Definition at line 128 of file kinetis/include/periph_cpu.h.

◆ kinetis_mcg_erc_range_t

Kinetis FLL external reference clock range settings.

Enumerator
KINETIS_MCG_ERC_RANGE_LOW 

for 31.25-39.0625 kHz crystal

KINETIS_MCG_ERC_RANGE_HIGH 

for 3-8 MHz crystal

KINETIS_MCG_ERC_RANGE_VERY_HIGH 

for 8-32 MHz crystal

Definition at line 402 of file kinetis/include/periph_cpu.h.

◆ kinetis_mcg_fll_t

Kinetis MCG FLL multiplier settings.

Enumerator
KINETIS_MCG_FLL_FACTOR_640 

FLL multiplier = 640.

KINETIS_MCG_FLL_FACTOR_732 

FLL multiplier = 732.

KINETIS_MCG_FLL_FACTOR_1280 

FLL multiplier = 1280.

KINETIS_MCG_FLL_FACTOR_1464 

FLL multiplier = 1464.

KINETIS_MCG_FLL_FACTOR_1920 

FLL multiplier = 1920.

KINETIS_MCG_FLL_FACTOR_2197 

FLL multiplier = 2197.

KINETIS_MCG_FLL_FACTOR_2560 

FLL multiplier = 2560.

KINETIS_MCG_FLL_FACTOR_2929 

FLL multiplier = 2929.

Definition at line 380 of file kinetis/include/periph_cpu.h.

◆ kinetis_mcg_mode

Kinetis possible MCG modes.

Enumerator
KINETIS_MCG_MODE_FEI 

FLL Engaged Internal Mode.

KINETIS_MCG_MODE_FEE 

FLL Engaged External Mode.

KINETIS_MCG_MODE_FBI 

FLL Bypassed Internal Mode.

KINETIS_MCG_MODE_FBE 

FLL Bypassed External Mode.

KINETIS_MCG_MODE_BLPI 

FLL Bypassed Low Power Internal Mode.

KINETIS_MCG_MODE_BLPE 

FLL Bypassed Low Power External Mode.

KINETIS_MCG_MODE_PBE 

PLL Bypassed External Mode.

KINETIS_MCG_MODE_PEE 

PLL Engaged External Mode.

KINETIS_MCG_MODE_NUMOF 

Number of possible modes.

Definition at line 363 of file kinetis/include/periph_cpu.h.

◆ uart_mode_t

UART transmission modes.

Enumerator
UART_MODE_8N1 

8 data bits, no parity, 1 stop bit

Definition at line 204 of file kinetis/include/periph_cpu.h.

◆ uart_type_t

UART hardware module types.

Enumerator
KINETIS_UART 

Kinetis UART module type.

KINETIS_LPUART 

Kinetis Low-power UART (LPUART) module type.

Definition at line 327 of file kinetis/include/periph_cpu.h.

Function Documentation

◆ gpio_init_port()

void gpio_init_port ( gpio_t  pin,
uint32_t  pcr 
)

CPU internal function for initializing PORTs.

Parameters
[in]pinpin to initialize
[in]pcrvalue for the PORT's PCR register