lpc2387/include/periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #include "cpu.h"
23 #include "periph/dev_enums.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 #include <stdint.h>
30 #include "cpu.h"
31 
36 #define __IO volatile
37 
41 typedef struct {
43  __IO uint32_t DIR;
45  uint32_t _reserved[3];
49  __IO uint32_t MASK;
53  __IO uint32_t PIN;
55  __IO uint32_t SET;
57  __IO uint32_t CLR;
58 } FIO_PORT_t;
59 
60 #define FIO_PORTS ((FIO_PORT_t*)FIO_BASE_ADDR)
61 #define PINSEL ((__IO uint32_t *)(PINSEL_BASE_ADDR))
62 #define PINMODE ((__IO uint32_t *)(PINSEL_BASE_ADDR + 0x40))
63 
64 int gpio_init_mux(unsigned pin, unsigned mux);
65 void gpio_init_states(void);
66 
67 #define GPIO_PIN(port, pin) (port<<5 | pin)
68 
69 #ifndef DOXYGEN
70 #define HAVE_GPIO_FLANK_T
71 typedef enum {
72  GPIO_FALLING = 1,
73  GPIO_RISING = 2,
74  GPIO_BOTH = 3
75 } gpio_flank_t;
76 #endif /* ndef DOXYGEN */
77 
81 #define TIMER_CHAN_NUMOF (4U)
82 
87 #define PERIPH_SPI_NEEDS_INIT_CS
88 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
89 #define PERIPH_SPI_NEEDS_TRANSFER_REG
90 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
91 /* @} */
92 
97 #define HAVE_SPI_CLK_T
98 typedef enum {
101  SPI_CLK_1MHZ = 1000,
102  SPI_CLK_5MHZ = 5000,
103  SPI_CLK_10MHZ = 10000
104 } spi_clk_t;
107 /* @} */
108 #ifdef __cplusplus
109 }
110 #endif
111 
112 #endif /* PERIPH_CPU_H */
113 
emit interrupt on rising flank
__IO uint32_t DIR
Direction: Output if corresponding bit is set, otherwise input.
__IO uint32_t SET
Output pins are set to high by setting the corresponding bit.
Fast GPIO register definition struct.
drive the SPI bus with 100KHz
#define __IO
LPC2387 MCU defines.
drive the SPI bus with 400KHz
emit interrupt on both flanks
Device enumerations for backward compatibility with existing peripheral driver implementations.
__IO uint32_t PIN
The current state of each pin of this port is accessible here (regardless of direction): If bit is se...
drive the SPI bus with 5MHz
drive the SPI bus with 10MHz
__IO uint32_t MASK
Set bits to ignore corresponding bits when accessing PIN, SET or CLR register of this port...
emit interrupt on falling flank
drive the SPI bus with 1MHz
void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
Configure an alternate function for the given pin.
__IO uint32_t CLR
Output pins are set to low by setting the corresponding bit.