stm32l1/include/cpu_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
21 #ifndef CPU_CONF_H
22 #define CPU_CONF_H
23 
24 #include "cpu_conf_common.h"
25 
49 #if defined(CPU_MODEL_STM32L151RBA)
50 #define STM32L1XX_MD (1U)
51 #elif defined(CPU_MODEL_STM32L151RC)
52 #define STM32L1XX_MDP (1U)
53 #else
54 #define STM32L1XX_XL (1U)
55 #endif
56 #include "vendor/stm32l1xx.h"
57 
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61 
66 #define CPU_DEFAULT_IRQ_PRIO (1U)
67 #if defined(CPU_MODEL_STM32L151RBA)
68 #define CPU_IRQ_NUMOF (45U)
69 #else
70 #define CPU_IRQ_NUMOF (57U)
71 #endif
72 #define CPU_FLASH_BASE FLASH_BASE
73 
79 #if defined(CPU_MODEL_STM32L152RE) || defined(CPU_MODEL_STM32L151RC)
80 #define FLASHPAGE_SIZE (256U)
81 #if defined(CPU_MODEL_STM32L152RE)
82 #define FLASHPAGE_NUMOF (2048U) /* 512KB */
83 #endif
84 #if defined(CPU_MODEL_STM32L151RC)
85 #define FLASHPAGE_NUMOF (1024U) /* 256KB */
86 #endif
87 #endif
88 /* The minimum block size which can be written is 4B. However, the erase
89  * block is always FLASHPAGE_SIZE.
90  */
91 #define FLASHPAGE_RAW_BLOCKSIZE (4U)
92 /* Writing should be always 4 bytes aligned */
93 #define FLASHPAGE_RAW_ALIGNMENT (4U)
94 
100 #define EEPROM_START_ADDR (0x08080000)
101 #if defined(CPU_MODEL_STM32L152RE)
102 #define EEPROM_SIZE (16384UL) /* 16kB */
103 #elif defined(CPU_MODEL_STM32L151RC)
104 #define EEPROM_SIZE (8192U) /* 8kB */
105 #endif
106 
108 #ifdef __cplusplus
109 }
110 #endif
111 
112 #endif /* CPU_CONF_H */
113 
Common CPU definitione for Cortex-M family based MCUs.