clock_config_t Struct Reference

Clock configuration for Kinetis CPUs. More...

Detailed Description

Clock configuration for Kinetis CPUs.

Definition at line 577 of file kinetis/include/periph_cpu.h.

#include </tmp/RIOT/cpu/kinetis/include/periph_cpu.h>

Data Fields

uint32_t clkdiv1
 Clock divider bitfield setting. More...
 
uint32_t rtc_clc
 RTC oscillator Capacitor Load Configuration bits. More...
 
uint32_t osc32ksel
 ERCLK32K 32 kHz reference selection. More...
 
unsigned int clock_flags
 Flags which will enable various clocking options at init. More...
 
kinetis_mcg_mode_t default_mode
 MCG mode used after initialization. More...
 
kinetis_mcg_erc_range_t erc_range
 ERC range setting. More...
 
uint8_t osc_clc
 OSC0 Capacitor Load Configuration bits. More...
 
uint8_t oscsel
 MCG external reference oscillator selection. More...
 
uint8_t fcrdiv
 Fast internal reference clock divider. More...
 
uint8_t fll_frdiv
 FLL ERC divider setting. More...
 
kinetis_mcg_fll_t fll_factor_fei
 FLL multiplier when running in FEI mode. More...
 
kinetis_mcg_fll_t fll_factor_fee
 FLL multiplier when running in FEE mode. More...
 
uint8_t pll_prdiv
 PLL ERC divider setting. More...
 
uint8_t pll_vdiv
 PLL VCO divider setting. More...
 

Field Documentation

◆ clkdiv1

uint32_t clock_config_t::clkdiv1

Clock divider bitfield setting.

The value will be written to the SIM_CLKDIV1 hardware register without any transformation. Use the SIM_CLKDIV1_OUTDIVx() macros to ensure the proper bit shift for the chosen divider settings.

See also
CPU reference manual, SIM_CLKDIV1

Definition at line 587 of file kinetis/include/periph_cpu.h.

◆ clock_flags

unsigned int clock_config_t::clock_flags

Flags which will enable various clocking options at init.

See also
kinetis_clock_flags_t

Definition at line 619 of file kinetis/include/periph_cpu.h.

◆ default_mode

kinetis_mcg_mode_t clock_config_t::default_mode

MCG mode used after initialization.

See also
kinetis_mcg_mode_t

Definition at line 625 of file kinetis/include/periph_cpu.h.

◆ erc_range

kinetis_mcg_erc_range_t clock_config_t::erc_range

ERC range setting.

See also
kinetis_mcg_erc_range_t

Definition at line 631 of file kinetis/include/periph_cpu.h.

◆ fcrdiv

uint8_t clock_config_t::fcrdiv

Fast internal reference clock divider.

The bits will be passed directly to the MCG_SC register without any transformation, use the MCG_SC_FCRDIV() macro to ensure the proper bit shift for the chosen setting.

See also
CPU reference manual, MCG_SC[FCRDIV]

Definition at line 662 of file kinetis/include/periph_cpu.h.

◆ fll_factor_fee

kinetis_mcg_fll_t clock_config_t::fll_factor_fee

FLL multiplier when running in FEE mode.

See also
kinetis_mcg_fll_t
CPU reference manual, MCG_C4[DMX32, DRST_DRS]

Definition at line 686 of file kinetis/include/periph_cpu.h.

◆ fll_factor_fei

kinetis_mcg_fll_t clock_config_t::fll_factor_fei

FLL multiplier when running in FEI mode.

See also
kinetis_mcg_fll_t
CPU reference manual, MCG_C4[DMX32, DRST_DRS]

Definition at line 679 of file kinetis/include/periph_cpu.h.

◆ fll_frdiv

uint8_t clock_config_t::fll_frdiv

FLL ERC divider setting.

The bits will be passed directly to the MCG_C1 register without any transformation, use the MCG_C1_FRDIV() macro to ensure the proper bit shift for the chosen setting.

See also
CPU reference manual, MCG_C1[FRDIV]

Definition at line 672 of file kinetis/include/periph_cpu.h.

◆ osc32ksel

uint32_t clock_config_t::osc32ksel

ERCLK32K 32 kHz reference selection.

The bits will be passed directly to the SIM_SOPT1 register without any transformation, use the SIM_SOPT1_OSC32KSEL() macro to ensure the proper bit shift for the chosen setting.

This signal is the input clock to the RTC module on some CPUs and an input option for the LPTMRx modules. On other CPUs the RTC is clocked directly by the RTC oscillator output without passing through this clock multiplexer.

See also
CPU reference manual, SIM_SOPT1[OSC32KSEL]

Definition at line 613 of file kinetis/include/periph_cpu.h.

◆ osc_clc

uint8_t clock_config_t::osc_clc

OSC0 Capacitor Load Configuration bits.

The bits will be passed directly to the OSC_CR register without any transformation, i.e. the SC16P bit is (unintuitively) the LSB, SC8P is the next bit, and so on (see details in the reference manual). Use the OSC_CR_SCxP_MASK macros to avoid accidentally reversing the bits here.

See also
CPU reference manual, OSC_CR[SCxP]

Definition at line 642 of file kinetis/include/periph_cpu.h.

◆ oscsel

uint8_t clock_config_t::oscsel

MCG external reference oscillator selection.

The bits will be passed directly to the MCG_C7 register without any transformation, use the MCG_C7_OSCSEL() macro to ensure the proper bit shift for the chosen setting.

See also
CPU reference manual, MCG_C7[OSCSEL]

Definition at line 652 of file kinetis/include/periph_cpu.h.

◆ pll_prdiv

uint8_t clock_config_t::pll_prdiv

PLL ERC divider setting.

The bits will be passed directly to the MCG_C5 register without any transformation, use the MCG_C5_PRDIV0() macro to ensure the proper bit shift for the chosen setting.

See also
CPU reference manual, MCG_C5[PRDIV0]

Definition at line 697 of file kinetis/include/periph_cpu.h.

◆ pll_vdiv

uint8_t clock_config_t::pll_vdiv

PLL VCO divider setting.

The bits will be passed directly to the MCG_C6 register without any transformation, use the MCG_C6_VDIV0() macro to ensure the proper bit shift for the chosen setting.

See also
CPU reference manual, MCG_C6[VDIV0]

Definition at line 707 of file kinetis/include/periph_cpu.h.

◆ rtc_clc

uint32_t clock_config_t::rtc_clc

RTC oscillator Capacitor Load Configuration bits.

The bits will be passed directly to the RTC_CR register without any transformation, i.e. the SC16P bit is (unintuitively) at bit position 10, SC8P is at position 11, and so on (see details in the reference manual). Use the RTC_CR_SCxP_MASK macros to avoid accidentally reversing the bits here.

See also
CPU reference manual, RTC_CR[SCxP]

Definition at line 599 of file kinetis/include/periph_cpu.h.


The documentation for this struct was generated from the following file: