Default interrupt vectors shared by Cortex-M based CPUs. More...
Default interrupt vectors shared by Cortex-M based CPUs.
Definition in file vectors_cortexm.h.
|Structure of Cortex-M basic vector table. More...|
|Use this macro to make interrupt functions overridable with the dummy_handler as fallback in case they are not implemented. |
|#define||ISR_VECTOR(x) __attribute__((used,section(".vectors." # x )))|
|Use this macro to define the parts of the vector table. More...|
|Number of Cortex-M non-ISR exceptions. More...|
|typedef void(*||isr_t) (void)|
|All ISR functions have this type. |
|This function is the default entry point after a system reset. More...|
|Non-maskable interrupt handler. More...|
|Hard fault exception handler. More...|
|Default handler used as weak alias for not implemented ISR vectors. More...|
|#define CPU_NONISR_EXCEPTIONS (15)|
|#define ISR_VECTOR||(||x||)||__attribute__((used,section(".vectors." # x )))|
Use this macro to define the parts of the vector table.
The entries in the vector table are sorted in ascending order defined by the (numeric) value given for
x. The Cortex-M base vectors are always defined with
ISR_VECTOR(0), so the CPU specific vector(s) must start from 1.
Default handler used as weak alias for not implemented ISR vectors.
Per default, all interrupt handlers are mapped to the dummy handler using a weak symbol. This means the handlers can be (should be) overwritten in the RIOT code by just implementing a function with the name of the targeted interrupt routine.
Hard fault exception handler.
Hard faults are triggered on errors during exception processing. Typical causes of hard faults are access to un-aligned pointers on Cortex-M0 CPUs and calls of function pointers that are set to NULL.
Non-maskable interrupt handler.
Non-maskable interrupts have the highest priority other than the reset event and can not be masked (surprise surprise...). They can be triggered by software and some peripherals. So far, they are not used in RIOT.
This function is the default entry point after a system reset.
After a system reset, the following steps are necessary and carried out: